Reference
The lookups, red flags, thresholds, and decision frameworks you will come back to. This is a chapter to bookmark and skim when you need an answer faster than you need an explanation, rather than one to read end to end.
How to use this page#
The other chapters teach principles. This one collects the lookups, formulas, checklists, and decision frameworks you reach for under time pressure. Each entry is short on purpose. If you want the full teaching, follow the links into the relevant chapter. If you just need to remember whether kTB is in dBm or watts, or how to compute a Doppler shift for a low-Earth-orbit pass, this page is where the answer lives.
Where do I find…#
The questions readers come back for, each linked to the paragraph that answers it rather than the chapter that contains it. The Find box in the contents panel does the same job for anything missing from this list.
Budgets and margin
- How much margin is enough?2.1, the gauge: negative, under 20%, 20% and up
- Why is the first power budget always light?2.2, how it fails
- What does a power budget forget?2.2, easy to forget
- Why carry 20 to 30% mass margin early?2.3, the fastener problem
- What do 3, 6, and 10 dB of link margin mean?2.4, reading the margin
- What does the free-space model leave out?2.4, how it fails
- What is WCET, and what do I add on top?2.5, WCET in plain language
- Where is the rate-monotonic bound explained?2.5, run your own numbers
- How do I measure current, mass, range, and execution time?2.6, measure, then believe
Requirements
- What is the shape of a good requirement?3.2, the SHALL statement
- Atomic, verifiable, unambiguous, complete: what each means3.2, characteristics
- Inspection, Analysis, Demonstration, or Test: which one?3.3, the table
- What does a traceability matrix catch?3.5, orphans, untested rows, conflicts
- The four requirements mistakes3.7, with weak and strong versions
- A worked example of turning a sentence into a requirement3.8, three promises
Design decisions
- The seven steps of a trade study4.2, step by step
- How to run the sensitivity check4.2, move ten weight points
- What to do with a near-tie4.2, reading a near-tie
- The one-page decision record template4.3, in this order
- The build-or-buy break-even arithmetic4.4, break-even
- Who wins when the user and the hardware collide?4.5, two masters
- Is this complexity ours, or inherited?4.7, the diagnostic question
- Do I actually need the FPGA?1.10, subtract a technology
Building and testing
- Where do test points go?5.2, where to add test points
- What goes in an ICD?5.3, electrical, mechanical, data, power sequencing
- In what order do I bring up a new board?5.5, dumb path first
- An example byte-level message definition5.9, the alert message
- What does each test tier include and leave out?6.2, the software tiers
- What goes in a test procedure?6.3, the anatomy
- What does an MTBF actually promise?6.5, MTBF
- Which environmental standards apply?6.6, the table
- Qualification versus acceptance testing6.8, once versus every unit
When things go wrong
- How do I write a problem statement?7.2, in observable terms
- The four lists: known, assumed, unknown, changed7.2, inventory
- How do I rank hypotheses?7.3, probability times cost-to-test
- The four-line status update7.7, and the four slides for a customer
- The layer-by-layer troubleshooting checkliston this page
Running the project
- Spike, demo, MVP, or production?Start here, the four flavors
- How do I write a project summary?1.5, with the sentinel example
- What does each gate ask?8.1, the phase table
- The release countdown from T minus 88.2, the release timeline
- Hotfix, patch, or update?8.4, match rigor to risk
- The customer now wants production: what do I say?8.6, MVP scope drift
- How do I make the cost case to management?8.8, in numbers
- How many productive hours are in a day?9.4, the 80% rule
- Estimating by weighted complexity9.4, the Fibonacci sheet
- When does adding people slow a project down?9.1, the coordination tax
- Which diagram answers which question?10.7, the table
Project red flags#
Patterns that show up reliably in projects that are about to slip, fail acceptance, or ship something the customer never wanted. None of these are proof of trouble on their own. Two or three together, especially across categories, is signal worth acting on.
Requirements
- “We will figure out requirements as we go”
- Requirements change weekly with no process
- Nobody can explain why a requirement exists
- Requirements conflict with each other
- “The customer will tell us when they see it”
Design
- “Let us make it generic for future use cases”
- No trade studies, just gut feelings
- Margins below 10% or completely unknown
- “We will optimize later”
- Architecture changes during implementation
- “We are doing it that way because the last project did”
Process
- No code reviews or peer checks
- Testing happens only at the end
- The first integration test is the entire system
- Code review comments are about style; nobody mentions the problem domain
- Documentation is “we will catch up later”
- “The latest version is the one I emailed you”
- Meetings to plan meetings to discuss meetings
- Decisions made by committee, no ownership
Team
- A key person is a single point of failure
- Engineers padding estimates three to five times
- Constant firefighting, no time to think
- “That is not my job”
- Finger-pointing instead of problem-solving
Schedule
- Schedule created by management without the engineers
- No buffer for integration or testing
- Delivery date set before requirements defined
- Critical path entirely on one person
- “We will catch up next sprint”
Customer relationship
- The customer has seen no progress in months
- Surprises at every demo
- “They will be happy with what we deliver”
- No customer involvement in reviews
- Different stakeholders want different things
Troubleshooting checklist#
When something fails, the temptation is to start with the most interesting hypothesis: the bug must be in the new code, in the protocol, in the architecture. Most of the time the bug is in something boring. The discipline is to check the boring things first, in order, before reaching for the interesting ones. The list is roughly ordered from cheapest to most expensive to check, and from most likely to least likely as a root cause. Problem solving is the full method.
Layer 0: is it actually broken?#
- Did you check the right device? Wrong board, wrong port, wrong terminal: very common.
- Is the symptom new, or did you just notice it?
- Can you reproduce it deliberately, or is it intermittent?
- What changed since it last worked?
Layer 1: power#
- Is it plugged in? Is the supply on? Is the LED lit?
- Measure voltage at the input. Is it the rated voltage?
- Measure voltage at the load. Did it sag under load?
- Check current draw. Is the regulator current-limiting?
- Check the fuse, the protection diode, the polarity.
Layer 2: signal integrity#
- Put a scope on the signal. Does it look clean?
- Check rise and fall times at the load against the receiver’s tolerance.
- Look for ringing, overshoot, undershoot, reflections.
- Verify termination on transmission lines: 50, 75, 100 ohms differential.
- Check for ground bounce, common-mode noise, ground loops.
Layer 3: cabling and connectors#
- Is the cable seated all the way? Connector locked?
- Continuity-test the cable end to end with a multimeter.
- Check for bent pins, damaged shielding, contamination.
- Swap cables. Cables are unreliable for the same reason fasteners are: they are cheap, they are moved often, and they fail silently.
Layer 4: protocol and framing#
- Capture the protocol: logic analyzer for digital, scope for analog, sniffer for network.
- Are bits being transmitted at all? At the right rate? With the right framing?
- Check addresses, IDs, framing markers, checksums, CRC.
- Verify endianness on both sides. Surprisingly common, surprisingly slow to find.
- Check timing: setup time, hold time, propagation delays. Logic analyzer in timing mode.
Layer 5: software state#
- Is the device in the state you think it is in?
- Initialization sequence: did every step succeed? Many drivers fail silently in init.
- Is an interrupt enabled? Masked? Stuck?
- Is the buffer overflowing? Underflowing? Wrapping?
- Check for race conditions, especially at startup or under load.
Layer 6: configuration#
- Are you running the version of code you think you are? See configuration management.
- Is the configuration file the one in source control, or the modified one on the test fixture?
- Build flags, defines, optimization levels: same as the last successful build?
- Has someone “helpfully” updated firmware on the test setup without telling anyone?
Common debug mistakes#
Thrash
Change multiple things at once. Assume it is the new code without checking. Skip the basic measurements. Trust documentation over measurement. Try to fix it before understanding the failure. Reboot and hope.
Close in
Change one variable, observe, document, repeat. Verify the basic path before chasing complex ones. Measure first, then form hypotheses. Trust your scope, your meter, your logic analyzer. Reproduce the bug deliberately before fixing. Write down what you tried and what you observed.
Margin thresholds at a glance#
The numbers the guide uses when it says “healthy” or “thin,” in one place. They are rules of thumb for early-phase design; a specific program may set its own, and the written ones win.
| Budget | Redesign | Thin, flag it | Healthy | Where it is taught |
|---|---|---|---|---|
| Power | Negative margin | Under 20% | 20% and up; 30% early in the design | 2.2 |
| Mass | Negative margin | Under 20% | 20 to 30% in early phases, shrinking as parts are weighed | 2.3 |
| Link | Under 3 dB | 3 to 6 dB | 6 dB acceptable, 10 dB and up comfortable | 2.4 |
| Timing | Above the rate-monotonic bound | Within 10 points of it | Under 70% utilization, with interrupt overhead counted | 2.5 |
| Component derating | At the rated limit | 80 to 100% of rating | 50 to 70% of rated power, under 80% of rated voltage | 6.5 |
| Schedule efficiency | Planned at 100% | Planned at 90% | Planned at about 80% of the hours in a day | 9.4 |
Formulas worth knowing#
The handful of formulas below come up often enough in everyday engineering that having them memorized, or at least bookmarked, saves real time. Each is paired with the situation where you reach for it. None of them substitute for understanding the underlying physics; they exist to remind you what you already know.
Decibels#
Power ratios in dB
Converting between a linear power ratio and decibels, which is the unit every link budget adds in.
dB = 10 log10(P2 / P1) P2 / P1 = 10^(dB / 10)
3 dB is twice the power; 10 dB is ten times; 20 dB is a hundred times. Use 20 log10 for voltage or field-strength ratios, because power goes as the square. dBm is dB relative to one milliwatt, so 0 dBm is 1 mW and 30 dBm is 1 W.
Power and electrical#
Ohm’s law
When you have any two of voltage, current, and resistance, and need the third.
V = I * R
V in volts, I in amps, R in ohms. The most-used formula in electrical work.
Power dissipation
Sizing regulators, heatsinks, current-sense resistors, or anything where heat could matter.
P = V * I = I^2 * R = V^2 / R
P in watts. Three forms because you usually have two of V, I, and R and need to compute heat from whichever pair you have.
Battery life, first approximation
Estimating runtime from battery capacity and average load.
hours = battery_Wh / average_W battery_Wh = battery_Ah * battery_V
Multiply by an efficiency and derating factor, typically 0.7 to 0.9, for conversion losses, temperature, and the cutoff voltage.
RF and link budgets#
Free-space path loss
Computing how much signal you lose between two antennas in clear air.
FSPL_dB = 20 log10(d_km) + 20 log10(f_MHz) + 32.45
The constant is 32.45 for kilometers and megahertz, 92.45 for kilometers and gigahertz, and -27.55 for meters and megahertz. Doubling the distance or the frequency adds 6 dB. Everything the free-space model leaves out, foliage, rain, multipath, pointing, goes in as a separate loss.
Thermal noise floor, kTB
Computing the noise floor of a receiver to figure out the minimum signal you need.
N_dBm = -174 + 10 log10(B_Hz) + NF_dB
B is the receiver bandwidth in hertz and NF is the receiver’s noise figure. The -174 dBm per hertz is kT at 290 K, the standard reference temperature. A 1 MHz receiver with a 3 dB noise figure sits at -111 dBm.
Doppler shift
Estimating the frequency offset for a moving emitter or receiver, especially low-Earth-orbit satellite passes.
delta_f = f * (v / c)
v is the relative line-of-sight velocity, c is the speed of light, f is the carrier frequency. For a 437 MHz amateur satellite in low Earth orbit, the maximum line-of-sight velocity is about 7.5 km/s, giving roughly plus or minus 10 kHz.
Carson’s rule, FM bandwidth
Sizing the bandwidth needed for an FM signal, including spectrum-allocation work and filter design.
BW = 2 * (delta_f + f_m)
delta_f is the peak frequency deviation, f_m is the highest modulating frequency. An approximation that captures roughly 98% of the signal power.
Wavelength
Antenna sizing, transmission line analysis, anything where you care about the physical size of the wave.
lambda = c / f
At 2.4 GHz the wavelength is roughly 12.5 cm, so a quarter-wave whip is about 3 cm. At 915 MHz it is 33 cm and the whip is about 8 cm; at 433 MHz, 69 cm and about 17 cm.
Signals and data#
Shannon’s capacity limit
Sanity-checking whether a proposed data rate is physically achievable on the link you have.
C = B * log2(1 + S/N)
C is channel capacity in bits per second, B is bandwidth in hertz, S/N is the linear signal-to-noise ratio, converted from dB first. If your design needs more than C, the link will never deliver it.
Nyquist sampling rate
Choosing a sample rate for an ADC or a DSP design.
f_s > 2 * f_max
Sample at strictly more than twice the highest frequency in your signal. In practice, oversample by two to five times to leave room for filtering.
Bit error rate versus SNR, rough
Estimating the SNR you need for a target BER on a given modulation.
QPSK: BER 1e-6 needs Eb/N0 of about 10.5 dB; BER 1e-3 needs about 6.8 dB
Different modulations have different curves, and coding moves them several dB. The exact numbers come from textbook tables; what you usually need is the order of magnitude.
Real-time scheduling#
Rate-monotonic utilization bound
Checking whether a set of periodic tasks will meet every deadline under fixed priorities assigned by period.
U = sum(C_i / T_i) <= n * (2^(1/n) - 1)
C is each task’s worst-case execution time, T its period, n the number of tasks. The bound is 100% for one task, 83% for two, 78% for three, and approaches 69% as n grows. Under the bound, every deadline is guaranteed. Over it, you need a full response-time analysis before you can say.
Reliability#
MTBF and reliability
Estimating how often something will fail, or sizing redundancy.
R(t) = e^(-t / MTBF)
R(t) is the probability of surviving to time t with no failure, for a constant failure rate. At t equal to the MTBF, R is 0.37: only about a 37% chance of running the full MTBF without a single failure.
Series and parallel reliability
Sizing redundant subsystems.
series: R = R1 * R2 * ... parallel: R = 1 - (1 - R1) * (1 - R2) * ...
Two units in series with R of 0.95 each give 0.90. Two in parallel give 0.9975. Redundancy is expensive and effective.
Decision framework: when to act#
When a project shows red flags, the question is what action the severity warrants, since the answer to “is this bad” is usually yes. The matrix below maps observed signals to action levels. The levels are deliberately tiered: treating every problem as a fire drains the meaning out of the response.
| Severity | What you observe | Action | Timeframe |
|---|---|---|---|
| Critical | Multiple red flags. Stakeholder loss of confidence. Schedule slipping with no recovery plan. | Stop, assess, restructure. Bring in an outside perspective. | Days |
| Serious | Specific red flags emerging. Team dysfunction. Quality dropping. | Address directly with the team and stakeholders. Document concerns. | Weeks |
| Concerning | Subtle warning signs. Things are off but unclear what. | Increase observation. Talk to team members. Watch for patterns. | Sprints |
| Routine | Normal project friction. Expected challenges. | Continue working through standard processes. | Ongoing |
Before adding any subsystem, interface, or layer of architecture, ask: is this complexity solving the problem in front of me, or inherited from a different problem? If you cannot answer the first version, you are inheriting solutions designed for someone else’s constraints. See complexity by inheritance.
Project kickoff checklist#
Before any project kicks off, the answers to a small set of questions need to be in writing: in a document, rather than in someone’s head or a hallway conversation. Each of these is cheap to answer at the start and expensive to answer later, when the project is in motion and the answer matters.
Problem definition
- What problem are we solving?
- Who has this problem?
- How is it being solved today?
- What is wrong with current solutions?
- How will we know we have succeeded?
Requirements and scope
- What MUST the system do?
- What SHOULD it do?
- What is nice to have?
- What is explicitly out of scope?
- Who approves changes?
Constraints and resources
- Budget: NRE and recurring
- Schedule: hard deadlines and milestones
- Team: skills available and gaps
- Technology: required versus preferred
- Standards: regulatory, industry, customer
Risks and dependencies
- Top five risks: technical, schedule, business
- Mitigation strategies for each
- External dependencies: vendors, parts, approvals
- What kills the project? Worst-case scenarios
- Who decides if we are in trouble?
Code review checklist#
A peer review by someone who understands the problem domain catches different things than a peer review by someone who only knows the language. The checklist below is a starting point, ordered roughly by impact: correctness first, design second, testing third. A review that surfaces only items from the third category and never the first is a signal to reach for reviewers with more domain context.
Correctness
- Does it implement the requirement?
- Are edge cases handled? NaN, zero, maximum, empty
- Error handling: graceful degradation?
- Concurrency: race conditions, deadlocks?
- Resource management: leaks, cleanup?
Design and maintainability
- Is the abstraction at the right level?
- Single responsibility per function and module?
- Naming: does it read naturally?
- Will someone understand this in six months?
- What is the SNR of this change? Could it be simpler?
Testing and documentation
- Tests for the happy path and the edge cases?
- Tests verify behavior rather than implementation?
- Comments explain why, more than what?
- Public APIs documented, with units and frames?
- Relevant external documents updated?
Common-sense checks#
Before any number you compute leaves your spreadsheet, run it past four quick filters that catch the order-of-magnitude errors subtle algebra misses. The answer that is off by a thousand will pass every formal check and fail every common-sense one.
- Order of magnitude.
- Does the answer make sense in human-scale units? A satellite with a 10 kilowatt continuous draw is wrong. A 50-meter-long handheld antenna is wrong. A controller running at 100 GHz on a board that costs $20 is wrong. If your answer would surprise an experienced colleague at a glance, the answer is wrong before the colleague checks the math.
- Units.
- Are the units consistent through the calculation? Most catastrophic errors come from mixing units: meters with feet, dB with linear ratios, watts with volts. The Mars Climate Orbiter was lost to this exact mistake. Annotate every variable with its unit and cancel the units symbolically along with the numbers.
- Sign and direction.
- A power that came out negative, a velocity in the wrong direction, a phase that went the opposite way: these are usually setup errors rather than results. Check the sign on the way out, along with the magnitude.
- Limits.
- What does the formula predict at the extremes, at zero, at infinity, at the boundary cases? If the answer at zero or infinity is nonsensical, the formula or the model is wrong somewhere. The limits are cheap sanity checks that catch errors the middle range hides.
The most common source of catastrophic engineering errors is good math applied to the wrong setup. Common-sense checks are how the professional catches those errors before someone else has to.
The sentinel at a glance#
The forest sentinel runs through the whole guide. Every artifact it produces is listed here, in the order a project would produce them, with a link to the chapter that builds it.
| Artifact | What it settles | Where |
|---|---|---|
| Project summary | What the customer gets, how it is used and deployed, the mesh direction, and the one thing withheld until measured | 1.5 |
| Power budget | Whether a node lasts a season; the two lines that decide it | 2.7 |
| Link budget | Why the direct hop misses by 6 dB and the mesh closes with room | 2.7 |
| Requirement set, SR-001 to IR-001 | The promises as testable statements, each with a parent and a method | 3.8 |
| Radio trade study and decision record | Mesh at 915 MHz, with 433 MHz direct held in reserve, and the measurement that would flip it | 4.9 |
| Bring-up plan and alert message ICD | Seven layers, dumbest first, power management last; the 14-byte message | 5.9 |
| Test procedure TP-001 and the traceability matrix | How alert latency gets proven; which rows are green | 6.3, 6.4 |
| Concept gate | The three questions the research phase answers and the three outcomes that all count as success | 8.10 |
| Weighted-complexity estimate | Six tasks, their shares, and the status in one line | 9.4 |
Useful acronyms#
Engineering documents are dense with abbreviations. The list below covers the ones most likely to show up in mixed-discipline conversations, with a one-line note on what each actually means in practice.
| Term | Meaning | What it actually is |
|---|---|---|
| AIT | Assembly, integration, test | The phase where things stop being subsystems and start being a system. |
| BER | Bit error rate | The fraction of received bits that are wrong; sets your link margin. |
| BOM | Bill of materials | The list of every part in your product. Drives cost and procurement. |
| CDR | Critical design review | The review that closes detailed design before fabrication. |
| ConOps | Concept of operations | How the system will be used, day to day, from the operator’s point of view. |
| COTS | Commercial off-the-shelf | You buy it. It already exists. Almost always cheaper than custom. |
| EDR | Engineering design release | The point where engineering hands off to manufacturing. |
| EMC | Electromagnetic compatibility | Whether your device coexists with everything else without interference. |
| EMI | Electromagnetic interference | The interference itself, the thing EMC tries to manage. |
| FAT | Factory acceptance test | The customer tests at your factory before shipment. |
| FMEA | Failure mode and effects analysis | Systematic walkthrough of how each part can fail and what happens when it does. |
| HALT | Highly accelerated life test | You stress the device until it breaks, to find the weakest link. |
| HASS | Highly accelerated stress screen | Production-line stress to weed out infant mortality. |
| ICD | Interface control document | The contract between two subsystems. Lock it early. |
| IDD | Interface design description | The same contract at the breadth level: what crosses each boundary and why, before the values are filled in. |
| IV&V | Independent verification and validation | An external team that audits your testing, with no skin in the game. |
| MIL-STD | Military standard | Defense specification documents, numbered: 810, 461, 1553, and so on. |
| MTBF | Mean time between failures | The reliability number on a datasheet. Usually optimistic. |
| MVP | Minimum viable product | The smallest version that delivers real value to a real user. Distinct from a prototype. |
| NRE | Non-recurring engineering | The one-time cost of designing something. The other large line item. |
| PDR | Preliminary design review | The review that closes architecture before detailed design begins. |
| PHY | Physical layer | The hardware that actually moves bits, below any protocol. |
| PRD | Product requirements document | The shared baseline: what the team is building and why, parked where everyone can see it. |
| RTM | Requirements traceability matrix | Every requirement, its design element, its test, and its status. The project’s memory. |
| SAT | Site acceptance test | The customer tests after deployment, on site. |
| SDR | Software-defined radio | RF processing in software rather than dedicated silicon. |
| SNR | Signal-to-noise ratio | How loud the signal is relative to the noise; usually in dB. Also, in this guide, the share of a codebase that does the job. |
| SoC | System on chip | Processor, peripherals, often FPGA fabric, on one die. |
| SRR | System requirements review | The gate that closes the requirements phase: do we agree on what done means? |
| TRL | Technology readiness level | 1 through 9; how mature a technology is, on NASA’s scale. |
| TRR | Test readiness review | The gate before formal verification: are the procedures, the fixtures, and the configuration ready? |
| V&V | Verification and validation | The combined discipline; verification is internal, validation is external. |
| WCET | Worst-case execution time | The slowest the task can ever run, well beyond the average. Hard to measure honestly. |